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SCALINX
, France
Job function SCALINX’s design team is seeking a dynamic and highly motivated Physical design engineer who will participate to the design of a state-of-the-art CMOS Transceiver ASIC for the Communications market. The candidate will execute the backend process through the entire RTL-to-GDSII flow including hierarchical floor planning, place & route,
Source de l'emploi : SCALINXAxelera AI
Paris, Île-de-France, France
About Us At Axelera.ai , we are a pioneering semiconductor startup company in Europe, dedicated to pushing the boundaries of technology with a focus on multi-core in-memory compute SoCs. As a member of our physical design team, you will play a pivotal role in contributing to our ongoing success and innovation. Location We offer a flexible, hybrid
Source de l'emploi : Axelera AIRHESO.TECH
Paris
Senior Physical Design Engineer (W/M) * Contract Type: Full-time (CDI) * Location: Paris * Ref: 1283 * Contact: ****************** Recruiting Company: French fabless semiconductor manufacturer specialized in the design and marketing of highly integrated, mixed-signal semiconductor products for markets demanding wideband and low power analog-to-di
Source de l'emploi : RHESO.TECHAxelera AI
Paris, Île-de-France, France
About Us At Axelera.ai , we are a pioneering semiconductor startup company in Europe, dedicated to pushing the boundaries of technology with a focus on multi-core in-memory compute SoCs. As a member of our physical design team, you will play a pivotal role in contributing to our ongoing success and innovation. Location We offer a flexible, hybrid
Source de l'emploi : Axelera AIMACOM
, France
MACOM designs and manufactures semiconductor products for Data Center, Telecommunication and Industrial and Defense applications. Headquartered in Lowell, Massachusetts, MACOM has design centers and sales offices throughout North America, Europe and Asia. MACOM is certified to the ISO9001 international quality standard and ISO14001 environmental ma
Source de l'emploi : MACOMmicroTECH Global Limited
, France
Position: Senior RTL Designer Type of contract: Permanent, Full time Location: Montbonnot (Grenoble area, France) or Sophia Antipolis (Nice area, France) About the role: You will be part of the Hardware CPU team, in charge of the full development of the new generation of high-performance processors in very advanced technology nodes. The company i
Source de l'emploi : microTECH Global LimitedmicroTECH Global Limited
, France
80K EUR per annum plus bonus and benefits Job Description Position: Senior Digital IC Design Engineer Location: Sophia Antipolis, France About the role: You will be involved in the development of next generation IP solutions, enabling the creation of extremely configurable digital circuits. You will be responsible to architect and design the ne
Source de l'emploi : microTECH Global LimitedSecure IC
, France
Permanent contract (CDI), based in Rennes or Paris. Within the Hardware Design team, in the context of customer and Road-map projects, your missions will be as follows: Configure the various Process Design Kits from multiple foundries (TSMC, GF, ST, …) on the workstations; Execute/maintain the logic synthesis flow, the Placement and Routing (PAR) f
Source de l'emploi : Secure IC, , France
€ 80.000 - 100.000
We are searching for a Physical Design / Back-End Technical Leader who will contribute to define, implement and follow-up on the Back-End technical aspects. You will support the definition of new products and in interface activities with customers.
Work description
Be responsible for the methodology, the design cycle of all physical partitions and the top level of all circuits, the maintenance and evolution of the development flow, and technological monitoring
Ensure permanent and effective support on all aspects of Hand-Off between the Back-End Digital team and FE design/Layout Analog.
Ensure the technical objectives and quality of the product as well as the development process. Ensure that the work produced is properly documented.
Lead, organize, and participate in design reviews
Support the development team based on the analysis of customer feedback
Develop and own physical design implementation of multi-hierarchy low-power designs, including physical-aware logic synthesis, design for testability, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes
Resolve design and flow issues related to physical design, identify potential solutions, and drive execution
Deliver physical design of an end-to-end IP or integration of ASIC/SoC design.
Qualification and Experience
Bachelor’s degree in Electrical Engineering or equivalent similar experience
More than 10 years’ of experience in physical design
Understanding of RTL2GDSII flow and design tape-outs in FDSOI and FinFet process technologies.
Experience with low power implementation, power gating, multiple voltage rails, UPF/CPF knowledge
Experience working with EDA tools like DC/Genus, ICC2/Innovus, Primetime, Redhawk/Voltus, or Calibre
Experience running physical-aware logic synthesis and achieving optimal synthesis QoR on low-power designs
Knowledge of static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions
Experience in Block-level and Full-chip floor-planning (ideally with IOs bumps) and power grid planning
Experience with custom or regular clock tree synthesis implementation at block level or top level, and clock power reduction techniques
Experience with Python, TCL, Perl scripting
Bilingual French & English
Ability to analyze and solve problems.
Job Reference 19003TOC
Location France
Categorisation Digital IC Design / Verification: Physical Design
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Senior Physical Design Engineer emplois en , , France
ⓘ Une erreur inattendue s'est produite lors du traitement de votre demande.
Veuillez rafraîchir la page et réessayer.
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Préparez-vous à découvrir votre prochaine grande opportunité.